Sunday, February 9, 2014

Star Rider VGG timers

If you designed this timer system, in 6 months, would you really be able to explain how it worked? :)

These were really hard to get because the design (and hence schematic) is a huge mess (I don't even know if the designers of the game knew what half of this crap did) and the timings came from a PROM.  In other words, figuring this out by hand is really hard (I foolishly made an attempt).  I ended up writing a little C program to figure it out for me which was a lot easier.  The above graph is the results of my C program.

UPDATE: Warren got a capture on real hardware and it matches my emulated version perfectly! :)

A few observations:

  • The main 6809E CPU runs at 1 MHz.  This was what I assumed for a long time but now I've "proven" it for sure.
  • The 4 MHz signal does not have a smooth rhythm.  I had also assumed this since it gets derived from the 6 MZ clock.  Had they derived it from the 12 MHz clock, they could've got the rhythm smooth.  I assume that despite the unusual cadence that it still performs its function just fine (controlling the blitters).
  • Plugging in the laserdisc video signal will throw these timers off temporarily.  The game has a (pretty neat) mechanism to sync up to the laserdisc's video.  Once in sync, I assume the timers will resume normal operation  (not confirmed).
  • Despite Q2 and CAS' being slightly different on the schematic, they appear to be identical in practice (at least as long as the laserdisc video input is not plugged in)
  • Same thing with Q7 and 4 MHz.  Q7 is connected to the 4 MHz flip-flop's clear pin, but this seems to have no effect (either that or I made a mistake).
  • LATCH seems intended to begin after E and end before E.
  • RAS' and CAS' are used to keep the video DRAM chips from losing their state.  What a horrid thing to have to deal with from a designer's perspective :)

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