I remember learning some equations about capacitors in school but I've long since forgotten this stuff and now I find that it would actually be useful for solving the below problem.
Here is how the game, Star Rider, derives vertical and horizontal sync by getting a composite sync input. My question is, how? How can one solve this on paper and predict when vsync and hsync will go low by only knowing the timing to csync and the resistance and capacitor values of this circuit?
The timing to csync (composite sync) is shown here (item 'b'):
Csync will either be 5V or ground.
Here is the circuit used in Star Rider:
W3 is connected, W4 is unconnected. All of the NOT gates are a 74LS14.
I'm not a math person (and my english is a bit broken) but...
ReplyDeleteYou have to think in the frequency spectrum
Vsync is in the area of 60Hz
R12 and C12 are low band pass filter (we ignore R15 for semplicity)
This filter let pass all signal having a frequincy lower of 1/(2*Pi(R12*C12))
In this case 1/2*3.14*(3300*0,000000022) =1/0.000455928=2193Hz
So it will only let pass the Vsync pulse...(since Hsync pulse are in the 15Khz area)
the one on the Hsync is an highband pass filter...
google for low/high-pass filter, I can't help more